manifold_simmc.cc
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00019 #include <string>
00020 #include <string.h>
00021 #include <sstream>
00022 #include <iostream>
00023 #include <iomanip>
00024 #include <cstdlib>
00025 #include <fstream>
00026 #include <map>
00027 #include "../../kernel/component.h"
00028 #include "../../kernel/simulator.h"
00029 #include "../../util/config_params.h"
00030 #include "../../util/mc_constants.h"
00031 #include "../../simIris/data_types/impl/irisEvent.h"
00032 #include "../../memctrl/request.h"
00033 #include "../../memctrl/request_handler.h"
00034 #include "../../memctrl/bus_handler.h"
00035 #include "../../memctrl/bus.h"
00036 #include "../../memctrl/dram.h"
00037 #include "../../memctrl/refresh_manager.h"
00038 #include "../../memctrl/response_handler.h"
00039 #include "../../memctrl/MC.h"
00040 #include "../../memctrl/mshr_standalone.h"
00041
00042 using namespace std;
00043
00044
00045
00046 vector<MSHR_SA_H*> mshrHandler;
00047
00048 void iris_process_options(int argc,char *argv[]);
00049 void dump_configuration ( void );
00050 bool GetNextRequest(Request *req, unsigned int *index);
00051
00052 int main(int argc, char **argv)
00053 {
00054 iris_process_options(argc,argv);
00055 dump_configuration();
00056 init_dram_timing_parameters();
00057
00058
00059 cout<< "TraceNames: ";
00060 for (unsigned int i=0; i<NO_OF_THREADS; i++)
00061 cout << traces[i] << ", ";
00062 cout << endl;
00063
00064 MC *mc = new MC();
00065 mc->Init();
00066 ifstream *trace_filename[NO_OF_THREADS];
00067
00068
00069 for (unsigned int i=0; i<NO_OF_THREADS; i++)
00070 {
00071 MSHR_SA_H *tempmshrH = new MSHR_SA_H();
00072 mshrHandler.push_back(tempmshrH);
00073 }
00074
00075 vector<Addr_t> addr;
00076 addr.resize(NO_OF_THREADS);
00077 vector<uint> thread_id;
00078 thread_id.resize(NO_OF_THREADS);
00079 vector<Time> time;
00080 time.resize(NO_OF_THREADS);
00081 vector<uint> cmd;
00082 cmd.resize(NO_OF_THREADS);
00083
00084 for (unsigned int i = 0; i<NO_OF_THREADS; i++)
00085 {
00086 mshrHandler[i]->id = i;
00087 mc->stats->doneOnce[i] = &mshrHandler[i]->done;
00088 trace_filename[i] = &mshrHandler[i]->trace_filename;
00089 mshrHandler[i]->filename = const_cast<char*>(trace_name.c_str());
00090 }
00091
00092 for (unsigned int i=0; i<NO_OF_THREADS; i++)
00093 {
00094
00095 (*trace_filename[i]).open(traces[i].c_str(),ios::in);
00096 if(!(*trace_filename[i]).is_open())
00097 {
00098 cout<<"Err opening trace"<<endl;
00099 exit(1);
00100 }
00101 }
00102
00103 for (unsigned int i=0; i<NO_OF_THREADS; i++)
00104 {
00105 if (!(*trace_filename[i]).eof())
00106 {
00107 (*trace_filename[i]) >> hex >> addr[i];
00108 (*trace_filename[i]) >> thread_id[i];
00109 (*trace_filename[i]) >> dec >> time[i];
00110 (*trace_filename[i]) >> dec >> cmd[i];
00111 }
00112
00113 Request *req2 = new Request();
00114 req2->cmdType = (cache_command)cmd[i];
00115 req2->address = addr[i];
00116 req2->arrivalTime = time[i];
00117 req2->threadId = i;
00118 req2->address = mshrHandler[i]->GlobalAddrMap(req2->address,i);
00119
00120 IrisEvent *event = new IrisEvent();
00121 event->src = NULL;
00122 event->dst = (Component*)(mshrHandler[i]);
00123 event->event_data.push_back(req2);
00124 #ifdef DEEP_DEBUG
00125 cout << dec << Simulator::Now() << ": " << hex << req2->address << ": First Request of each trace to be send to mshrs" << endl;
00126 #endif
00127 Simulator::Schedule(time[i], &MSHR_SA_H::process_event, (MSHR_SA_H*)event->dst, event);
00128 }
00129
00130 IrisEvent *event2 = new IrisEvent();
00131 event2->type = CONTINUE;
00132 Simulator::Schedule(Simulator::Now()+1, &MC::sim_main, mc, event2);
00133
00134 for (unsigned int i = 0; i<NO_OF_THREADS; i++)
00135 {
00136 mshrHandler[i]->globalUnSink += mshrHandler[i]->unsink;
00137 }
00138
00139
00140 Simulator::StopAt(max_sim_time);
00141 Simulator::Run();
00142
00143 mc->stats->CalculateAggregateStats();
00144 cerr << mc->stats->PrintAggregateStats(0);
00145
00146 delete mc;
00147 return 0;
00148 }
00149
00150 bool GetNextRequest(Request *req, unsigned int *index)
00151 {
00152 bool temp = false;
00153
00154
00155
00156
00157 static int lastThreadIndex = NO_OF_THREADS -1;
00158 vector<Time> time;
00159 time.resize(NO_OF_THREADS);
00160 vector<bool> mshrFilled;
00161 mshrFilled.resize(NO_OF_THREADS);
00162 for (unsigned int i=0; i<NO_OF_THREADS; i++)
00163 {
00164 mshrFilled[i] = true;
00165 time[i] = -1;
00166 }
00167 for (unsigned int i=0; i<NO_OF_THREADS; i++)
00168 {
00169 unsigned int rr = (i+lastThreadIndex+1)%NO_OF_THREADS;
00170 if (!mshrHandler[rr]->mshr.empty())
00171 {
00172 if ( mshrHandler[rr]->lastScheduledIndex < mshrHandler[rr]->mshr.size() )
00173 {
00174 time[rr] = mshrHandler[rr]->mshr[mshrHandler[rr]->lastScheduledIndex].arrivalTime;
00175 temp = true;
00176 mshrFilled[rr] = false;
00177 break;
00178 }
00179 }
00180 if (!mshrHandler[rr]->writeQueue.empty())
00181 {
00182 time[rr] = mshrHandler[rr]->writeQueue[0].arrivalTime;
00183 temp = true;
00184 break;
00185 }
00186 }
00187
00188 if (!temp)
00189 return temp;
00190 unsigned int minTime = -1;
00191 for (unsigned int i=0; i<NO_OF_THREADS; i++)
00192 {
00193 unsigned int rr = (i+lastThreadIndex+1)%NO_OF_THREADS;
00194 if (!mshrHandler[rr]->writeQueue.empty())
00195 {
00196 vector<Request>::iterator bufferIndex = mshrHandler[rr]->writeQueue.begin();
00197 *req = mshrHandler[rr]->writeQueue[0];
00198 mshrHandler[rr]->writeQueue.erase(bufferIndex);
00199 lastThreadIndex = rr;
00200 return true;
00201 }
00202 else if (time[rr] < minTime && !mshrFilled[rr])
00203 {
00204 minTime = time[rr];
00205 *index = rr;
00206 lastThreadIndex = *index;
00207 *req = mshrHandler[rr]->mshr[mshrHandler[rr]->lastScheduledIndex];
00208 temp = true;
00209 }
00210 }
00211 mshrHandler[*index]->lastScheduledIndex++;
00212
00213 return temp;
00214 }
00215
00216 void MC::sim_main(IrisEvent* e)
00217 {
00218 Request *req;
00219 unsigned int evType;
00220 switch (e->type)
00221 {
00222 case CONTINUE:
00223 {
00224 if (!reqH->oneBufferFull)
00225 {
00226 unsigned int index;
00227 req = new Request();
00228 if (GetNextRequest(req, &index))
00229 {
00230 IrisEvent *e = new IrisEvent();
00231 e->src = NULL;
00232 e->dst = (Component*)reqH;
00233 e->event_data.push_back((void*)req);
00234 e->type = START;
00235 Simulator::Schedule(Simulator::Now()+1, &RequestHandler::process_event, (RequestHandler*)e->dst, e);
00236 evType = CONTINUE;
00237 break;
00238 }
00239 else
00240 {
00241 evType = CONTINUE;
00242 delete req;
00243 }
00244 }
00245 else
00246 {
00247 evType = CONTINUE;
00248 }
00249 break;
00250 }
00251 }
00252
00253 IrisEvent *event2 = new IrisEvent();
00254 event2->type = evType;
00255 Simulator::Schedule(Simulator::Now()+1, &MC::sim_main, this, event2);
00256
00257 delete e;
00258 return;
00259 }
00260
00261 void
00262 dump_configuration ( void )
00263 {
00264
00265 cerr << " no_of_mcs:\t" << no_mcs << endl;
00266 cerr << " no_of_traces:\t" << traces.size() << endl;
00267 cerr << " max_sim_time:\t" << max_sim_time << endl;
00268 cerr << " THREAD_BITS_POSITION:\t" << THREAD_BITS_POSITION<< endl;
00269 cerr << " MC_ADDR_BITS:\t" << MC_ADDR_BITS<< endl;
00270 cerr << " NETWORK_BITS:\t" << NETWORK_ADDRESS_BITS << endl;
00271 cerr << " COREID_BITS:\t" << NETWORK_THREADID_BITS << endl;
00272 cerr << " COMMAND_BITS:\t" << NETWORK_COMMAND_BITS << endl;
00273 cerr << " NO_OF_THREADS:\t" << NO_OF_THREADS << endl;
00274 cerr << " NO_OF_CHANNELS:\t" << NO_OF_RANKS << endl;
00275 cerr << " NO_OF_RANKS:\t" << NO_OF_RANKS << endl;
00276 cerr << " NO_OF_BANKS:\t" << NO_OF_BANKS << endl;
00277 cerr << " NO_OF_ROWS:\t" << NO_OF_ROWS << endl;
00278 cerr << " NO_OF_COLUMNS:\t" << NO_OF_COLUMNS << endl;
00279 cerr << " COLUMN_SIZE:\t" << COLUMN_SIZE << endl;
00280 cerr << " Msg_class with arbitration priority:\t" << msg_type_string << endl;
00281
00282 if( traces.size() < (no_nodes - no_mcs) )
00283 {
00284 cout << " Not enough trace files for simulation " << endl;
00285 exit(1);
00286 }
00287 return ;
00288 }
00289
00290 void iris_process_options(int argc,char *argv[])
00291 {
00292
00293
00294 unsigned int offset;
00295 ifstream fd(argv[1]);
00296 string data, word;
00297 while(!fd.eof())
00298 {
00299 getline(fd,data);
00300 string::size_type position = -1;
00301 position = data.find("#");
00302 istringstream iss( data, istringstream::in);
00303 while ( position > data.size() && iss >> word )
00304 {
00305 if ( word.compare("MCS") == 0)
00306 iss >> no_mcs;
00307 if ( word.compare("MAX_SIM_TIME") == 0)
00308 iss >> max_sim_time;
00309 if ( word.compare("THREAD_BITS_POSITION") == 0)
00310 iss >> THREAD_BITS_POSITION;
00311 if ( word.compare("MC_ADDR_BITS") == 0)
00312 iss >> MC_ADDR_BITS;
00313 if ( word.compare("BANK_BITS") == 0)
00314 iss >> BANK_BITS;
00315
00316 if ( word.compare("NO_OF_NODES") == 0)
00317 iss >> no_nodes;
00318 NO_OF_THREADS = no_nodes;
00319 if ( word.compare("NO_OF_CHANNELS") == 0)
00320 iss >> NO_OF_CHANNELS;
00321 if ( word.compare("NO_OF_RANKS") == 0)
00322 iss >> NO_OF_RANKS;
00323 if ( word.compare("NO_OF_BANKS") == 0)
00324 iss >> NO_OF_BANKS;
00325 if ( word.compare("NO_OF_ROWS") == 0)
00326 iss >> NO_OF_ROWS;
00327 if ( word.compare("NO_OF_COLUMNS") == 0)
00328 iss >> NO_OF_COLUMNS;
00329 if ( word.compare("COLUMN_SIZE") == 0)
00330 iss >> COLUMN_SIZE;
00331 if ( word.compare("MSHR_SIZE") == 0)
00332 iss >> MSHR_SIZE;
00333
00334 if ( word.compare("MAX_BUFFER_SIZE") == 0)
00335 iss >> MAX_BUFFER_SIZE;
00336 if ( word.compare("MAX_CMD_BUFFER_SIZE") == 0)
00337 iss >> MAX_CMD_BUFFER_SIZE;
00338 if ( word.compare("RESPONSE_BUFFER_SIZE") == 0)
00339 iss >> RESPONSE_BUFFER_SIZE;
00340
00341 if ( word.compare("NETWORK_ADDRESS_BITS") == 0)
00342 iss >> NETWORK_ADDRESS_BITS;
00343 if ( word.compare("NETWORK_THREADID_BITS") == 0)
00344 iss >> NETWORK_THREADID_BITS ;
00345 if ( word.compare("NETWORK_COMMAND_BITS") == 0)
00346 iss >> NETWORK_COMMAND_BITS;
00347
00348 if ( word.compare("DRAM_PAGE_POLICY") == 0)
00349 iss >> dram_page_policy_string;
00350 if ( word.compare("ADDRESS_MAP_SCHEME") == 0)
00351 iss >> addr_map_scheme_string;
00352 if ( word.compare("MC_SCHEDULING_ALGORITHM") == 0)
00353 iss >> mc_scheduling_algorithm_string;
00354
00355 if ( word.compare("TRACE") == 0)
00356 {
00357 iss >> trace_name;
00358 traces.push_back(trace_name);
00359 }
00360 }
00361 }
00362
00363 for ( uint i=0; i<argc; i++)
00364 {
00365 if( strcmp(argv[i],"--thread_id_bits")==0)
00366 THREAD_BITS_POSITION = atoi(argv[i+1]);
00367 if( strcmp(argv[i],"--mc_bits")==0)
00368 MC_ADDR_BITS = atoi(argv[i+1]);
00369 if( strcmp(argv[i],"--bank_bits")==0)
00370 BANK_BITS = atoi(argv[i+1]);
00371 }
00372
00373 if( dram_page_policy_string.compare("OPEN_PAGE_POLICY") == 0)
00374 dram_page_policy = OPEN_PAGE_POLICY;
00375 if( dram_page_policy_string.compare("CLOSE_PAGE_POLICY") == 0)
00376 dram_page_policy = CLOSE_PAGE_POLICY;
00377
00378 if( mc_scheduling_algorithm_string.compare("FR_FCFS") == 0)
00379 mc_scheduling_algorithm = FR_FCFS;
00380 if( mc_scheduling_algorithm_string.compare("FC_FS") == 0)
00381 mc_scheduling_algorithm = FC_FS;
00382 if( mc_scheduling_algorithm_string.compare("PAR_BS") == 0)
00383 mc_scheduling_algorithm = PAR_BS;
00384
00385 if( addr_map_scheme_string.compare("PAGE_INTERLEAVING") == 0)
00386 addr_map_scheme = PAGE_INTERLEAVING;
00387 if( addr_map_scheme_string.compare("PERMUTATION") == 0)
00388 addr_map_scheme = PERMUTATION;
00389 if( addr_map_scheme_string.compare("CACHELINE_INTERLEAVING") == 0)
00390 addr_map_scheme = CACHELINE_INTERLEAVING;
00391 if( addr_map_scheme_string.compare("GENERIC") == 0)
00392 addr_map_scheme = GENERIC;
00393 if( addr_map_scheme_string.compare("NO_SCHEME") == 0)
00394 addr_map_scheme = NO_SCHEME;
00395 if( addr_map_scheme_string.compare("LOCAL_ADDR_MAP") == 0)
00396 addr_map_scheme = LOCAL_ADDR_MAP;
00397
00398 return;
00399 }
00400