00001 /* 00002 * ===================================================================================== 00003 * 00004 * Filename: routerVcMP.h 00005 * 00006 * Description: Router that can be used with meshes/multiple_vcs/DOR 00007 * 1. Usess vcs purely for improving buffer and link utilization. 00008 * 2. Self contained: Example of how you can not use too many pseudo 00009 * components 00010 * 3. WARNING: Does not check if the buffer is empty before sending a new 00011 * pkt out. Uses the non blocking interface. 00012 * 00013 * Version: 1.0 00014 * Created: 03/11/2010 08:56:06 PM 00015 * Revision: none 00016 * Compiler: gcc 00017 * 00018 * Author: Mitchelle Rasquinha (), mitchelle.rasquinha@gatech.edu 00019 * Company: Georgia Institute of Technology 00020 * 00021 * ===================================================================================== 00022 */ 00023 00024 #ifndef _routerVcMP_h_INC 00025 #define _routerVcMP_h_INC 00026 00027 #include "../interfaces/router.h" 00028 #include "genericBuffer.h" 00029 #include "genericRC.h" 00030 //#include "pvtopv_swa.h" 00031 #include "genericVcAllocator.h" 00032 #include "ptopSwaVcs.h" 00033 #include "genericCrossbar.h" 00034 #include "../../../util/genericData.h" 00035 #include "../../../util/stats.h" 00036 #include "genericLink.h" 00037 #include <sys/time.h> 00038 #include <algorithm> 00039 #include <list> 00040 00041 extern uint send_early_credit; 00042 extern uint stat_print_level; 00043 extern uint do_two_stage_router; 00044 extern void print_state_at_deadlock(void); 00045 extern IrisStats* istat; 00046 00047 class RouterVcMP: public Router 00048 { 00049 public: 00050 RouterVcMP (); 00051 ~RouterVcMP(); 00052 void init(uint ports, uint vcs, uint credits, uint buffer_size); 00056 void set_no_nodes( uint nodes); 00059 void set_grid_x_location ( uint a, uint b, uint c); 00060 void set_grid_y_location ( uint a, uint b, uint c); 00061 00062 void send_credit_back( uint i); 00063 00064 void process_event(IrisEvent* e); 00065 string toString() const; 00066 string print_stats(); 00067 void set_edge_links(); 00068 vector< vector<uint> > downstream_credits; 00069 void dump_buffer_state(); 00070 00071 00072 protected: 00073 00074 private: 00075 vector <GenericBuffer> in_buffers; 00076 vector <GenericRC> decoders; 00077 vector <InputBufferState> input_buffer_state; 00078 vector< list< uint> > vc_alloc; 00079 vector< vector< uint> > sw_alloc; 00080 vector< vector <uint> >request_op; 00081 vector <uint> available_ports; 00082 vector <uint> available_vcs; 00083 vector < vector<uint> > cr_time; 00084 00085 bool ticking; 00086 void handle_link_arrival_event(IrisEvent* e); 00087 void handle_tick_event(IrisEvent* e); 00088 void handle_detect_deadlock_event(IrisEvent*); 00089 void do_switch_traversal(); 00090 void do_switch_allocation(); 00091 void do_input_buffering(); 00092 void do_virtual_channel_allocation(); 00093 void request_switch_allocation(); 00094 00096 double stat_buffer_occupancy; 00097 uint stat_packets; 00098 uint stat_flits; 00099 double stat_total_packet_latency; 00100 double last_flit_out_cycle; /* indicates the last active cycle for the router */ 00101 double stat_swa_fail_msg_ratio; 00102 double stat_swa_load; 00103 double stat_vca_fail_msg_ratio; 00104 double stat_vca_load; 00105 ullint stat_sim_total_time; 00106 vector< vector<uint> > stat_packet_out; 00107 vector< vector<uint> > stat_flit_out; 00108 bool is_mc_router; 00109 ullint stat_ib_cycles; 00110 ullint stat_rc_cycles; 00111 ullint stat_vca_cycles; 00112 ullint stat_swa_cycles; 00113 ullint stat_st_cycles; 00114 00115 }; /* ----- end of class RouterVcMP ----- */ 00116 00117 #endif /* ----- #ifndef _routerVcMP_h_INC ----- */ 00118