- s -

• SA_unit() : SA_unit
• Schedule() : Simulator
• Send() : Link
• send_credit_back() : RouterVcMP , GenericRouter4Stg , GenericRouterPhy , RouterReqReply
• set_buffer_size() : GenericInterfaceNB , GenericInterfacePhy , Interface
• set_edge_links() : GenericRouter4Stg , RouterReqReply , RouterVcMP
• set_grid_x_location() : GenericRouter4Stg , GenericRouterPhy , RouterReqReply , RouterVcMP , Router
• set_grid_y_location() : Router , GenericRouter4Stg , GenericRouterPhy , RouterReqReply , RouterVcMP
• set_max_phy_link_bits() : Mesh , Ring , Torus
• set_no_channels() : AddressDecoder
• set_no_credits() : GenericBuffer , GenericInterfaceNB , GenericInterfacePhy , Interface
• set_no_msg_classes() : VcaMsgAware
• set_no_nodes() : GenericRouter4Stg , GenericRouterPhy , RouterReqReply , RouterVcMP , Router
• set_no_requestors() : GenericArbiter
• set_no_vc() : InputBuffer
• set_no_vcs() : Interface , GenericInterfaceNB , GenericInterfacePhy , GenericPktGen , GenericRPG , GenericTracePktGen , McFrontEnd
• set_no_virtual_channels() : GenericCrossbar
• set_output_path() : GenericSink , GenericFlatMc , GenericPktGen , GenericTracePktGen , McFrontEnd , Processor
• set_request_matrix() : GenericVcAllocator
• set_trace_filename() : GenericPktGen , GenericTracePktGen
• setComponentId() : Component
• setup() : Ring , Topology , Processor , GenericFlatMc , Mesh , McFrontEnd , GenericLink , GenericRPG , GenericVcAllocator , GenericSink , Interface , GenericTracePktGen , Torus , GenericInterfaceNB , GenericCrossbar , GenericInterfacePhy , GenericPktGen
• size() : VirtualChannelArbiter , LowLevelPacket
• speculate_channel() : AddressDecoder , GenericRC
• speculate_port() : AddressDecoder , GenericRC
• squash_requests() : GenericVcAllocator
• StatLink() : StatLink
• StatRouter() : StatRouter
• Stop() : Simulator
• StopAt() : Simulator
• strip_mc_bits() : McFrontEnd